■ | General |
|
● | When: |
Section | Date | Start Time |
251 | 04-03-2025 (Thursday) | 11:00 am |
255 & 256 | 04-03-2025 (Thursday) | 06:30 pm |
● | Duration: 1 hour 20 minutes. |
● | Questions can be on anything up to and including the lectures on 10/31/2024 (upcoming Thursday). |
► | That means the most relevant lecture
notes are
005a NotesOnBitwiseOperations 006 ComputerOrg&DesignOverview01 007 ComputerOrg&DesignOverview02 008 MIPS32ArchitectureOverview 009 MIPS32AssemblyLanguageGettingStarted 010 MIPS32AssemblyLanguageDoingBasics01 010a MIPS32AssemblyLanguageDoingBasics01_SomeDetailsQuirks 011 MIPS32AssemblyLanguageDoingBasics02 011_MIPS32AssemblyLanguageDoingBasics02_KeySlidesEtc |
● | Test will be closed books / notes / online-resources / discussion and no calculating devices of any kind are allowed. |
► | All allowed reference material (such as the first 2 pages of this posted under Other Resources) will be provided as part of the exam. |
|
■ | Checklist of (most if not all) the
things you are expected to know and/or know how to do/apply: (NOTE: Some items seen earlier have been bolstered/deepened, so they can re-appear here.) |
|
● | Know about bitwise operations, what they are useful for, and how to put them to use. |
► | What bit shifting is and how it can be useful. |
○ | Logical left shift, logical right shift, arithmetic right shift. |
○ | Efficient multiplication and division by powers of 2 for signed/unsigned numbers (and unsigned floating-point numbers) represented in binary. |
♯ | How, and under what provisions (for results to be valid). |
○ | Simply to bring certain bit(s) to certain desired position(s). |
► | What binary bitwise operation(s) and mask(s) to use to attain certain effects (setting/clearing/toggling/complementing/extracting/isolating/... of bit(s)). |
○ |
|
○ | What combination of operation and mask to use to go from what's given to what's desired. |
► | XOR intrigue: |
○ | Same polarity gives 0, different polarity gives 1. |
○ | XOR a bit pattern P with itself makes P all 0's (clears P). |
● | The 4 main components of a computer system (based on the von-Neumann architecture). |
► | CPU (processor), main memory, I/O devices, main (system) bus. |
● | The 3 buses that form the system bus. |
► | Address, data, control. |
● | What register and register file refer to (in reference to the main processor). |
● | Know about the program counter (PC) and instruction register (IR) - what they are for. |
● | Know about the memory hierarchy of the typical computer: register -> cache memory -> main memory (RAM) -> disk ... |
● | What datapath and control are (from functional standpoint). |
► | "brawn" and "brain". |
● | What an instruction is (especially what its 2 main parts are: opcode and operands) and what an instruction set is. |
● | What 3 possible places the actual value of an operand (required to execute an instruction) may be located (for our programming purpose). |
► | In register, in memory, embedded within instruction - the last of the three is referred to as immediate in MIPS. |
● | What addressing mode means. |
► | Way of specifying the location(s) of operand(s) involved in an instruction - each operand may be a soure operand or a destination operand. |
● | The main differences between CISC and RISC. |
► | RISC design principles (C2S2). |
○ | Smaller is faster. |
○ | Simplicity favors regularity. |
○ | Make the common case fast. |
○ | Good design demands making good compromises. |
► | How certain MIPS design characteristics relate to RISC design principles. |
○ | E.g.: Which design principle best explains why MIPS $0 register is hardwired to always contain 0. |
● | Big picture understanding of what pipelining is. |
► | Goal is to enhance throughput (how much is done per unit time). |
● | Know about programmer's view of main memory: linear pool of storage locations, memory addresses, address space. |
● | What byte addressable memory mean. |
► | There's an address for each byte (at each byte boundary), not for each bit and not just for each (multi-byte) word. |
● | Know what load and store memory operations are. |
● | Know that memory operations are relatively slow (relative to accessing registers). |
● | What it means when an architecture is described as a load-store architecture. |
► | Only load and store instructions access (read from or write to) main memory. |
● | MIPS32 architectural overview. |
► | CPU, memory, Coprocessor 0, Coprocessor 1. |
► | Some 32's about MIPS32. |
○ | 32 general purpose registers. |
○ | Each general purpose register is 32 bits wide. |
○ | 32-bit address --> 4GB address space. |
○ | 32-bit word. |
○ | Uses 32-bit (a word) to represent integer data type . |
○ | Each (and every) instruction is 32-bit wide --> fixed width. |
► | The typical (conventional) layout of the virtual memory address space. |
○ | Text, data (static and dynamic) and stack segments and reserved memory. |
♯ | Text segment --> where.program code will be placed. |
♯ | Static data segment --> where.global data will be placed. |
♯ | Stack segment --> where (non-static) local data will be placed. |
► | Preliminaries on MIPS32's general purpose registers. |
○ | Names used to reference them. |
○ | Need for usage convention --> to regulate use of shared resource (many competing parties, 1 register file). |
♯ | Preliminary notions: $0, $v#, $a#, $t# ( temporary ), $s# ( saved ), others. |
(Due to MIPS register usage convention, do not use the $s# ( saved ) registers until explicitly required to use them later, if ever.) |
● | MARS and first-program basics. |
► | MARS interface basics. |
○ | Key panes/windows, tab-metaphor, ... |
► | What the 3 categories of MIPS assembly language statements are and things about them. |
○ | Assembler directives --> each begins with a dot --> for use by assembler --> DON'T produce machine instructions. |
○ | (True) Instructions --> supported by assembler and by hardware --> each has an opcode assigned. |
○ | Pseudoinstructions --> supported by assembler but not by hardware --> opcode not applicable. |
♯ | Assembler translates each pseudoinstruction into 1 or more (true) instructions. NOTE: Thus, each pseudoinstruction (unlike assembly directive) effectively/ultimately DOES produce machine instruction(s). |
► | Labels. |
○ | Enables programmer to mark strategic data/code locations --> for referencing convenience during coding. |
♯ | C/C++ variable and function names both map to labels in assembly language. |
○ | Key helper item generated/used by assembler to support labeling --> symbol table. |
♯ | Primarily, a tabular list of what address each symbol corresponds to. |
► | System services. |
○ | How a typical syscall is made --> basic I/O and graceful exit. |
♯ | Know how to write code involving syscall to do integer I/O. |
♯ | Know how to write code involving syscall to do (null-terminated) string I/O. |
♯ | Know how to write code involving syscall to do character I/O. |
● | How to use MIPS assembler directives. |
► | Segment declaration: .data and .text in particular. |
► | Data segment (global) storage space reservation/initialization/naming: .asciiz, .word, .byte and .space in particular. |
► | Miscellaneous specification: .globl in particular. |
● | How to write assembly language code to perform relatively simple tasks: |
► | Writing program segments involving arithmetic, bit manipulation and main memory data movement. |
○ | Addition/subtraction/multiplication/division involving integers. |
♯ | Bit-shifting for multiplications/divisions by powers of 2. |
○ | and and andi, or and ori, xor and xori, sll, srl and sra. (MIPS also supports nor but either disregarded or only mentioned in passing here.) |
♯ | Bit manipulations (including masking) for various desired effects. |
○ | lb and lw, sb and sw. |
♯ | Pointer-arithmetic and memory-alignment traps. |
► | Know how to re-write C++ code involving selection (if and if-else) and/or repetition (for, while and do-while) and/or one-way transfer (break and continue) in terms of conditional and unconditional goto's. |
○ | (NOTE: Prerequisite C++ neatly used to play "pseudo-code" role in this course.) |
○ | May be nested and may involve compound conditions (i.e., conditions involving logical AND and/or logical OR). |
○ | Questions testing student's
ability to read (interpret)/debug/complete/modify/... code involving
above use of conditional and unconditional goto's are common/popular. |
|
■ | Other |
|
● | Other relevant material. |
► | Use Assignment 2 (up to and including Assign02P2) as part of the preparation. |
► | In-class examples (posted under Examples). |
● | You may want to check out sample past Exam 2 questions already posted on the class homepage. |
► | You should not however, expect the questions to be identical in number, kind, topic coverage, etc. |
● | You should not have to worry about questions being written on topics we have not yet covered. |
► | NOTE that to fully answer some questions may require knowledge and application of material covered previously. |
● | Do the following if you are eligible and intend to use ATSD-supported accommodations (extended time, . . .): |
► | Follow proper procedure to request taking the exam at the ATSD. |
○ | You typically need to do the request at least a certain number of (non-weekend?) hours in advance. |
○ | The start time of your request should be the closest to your class start time on exam date. |