Bit-flip Minimization

This work intelligently modifies key constants in CUDA programs to reduce the number of bit flips on the memory bus, thus saving energy without changing the program's performance or correctness. Please see the paper cited below for more details.

All of the following codes operate on graphs stored in binary CSR format. Converters to this format as well as several already converted graphs can be found here. APSP requires smaller inputs, several of which are available here.

Click on the following links to download our codes. Note that the codes are protected by the license included in the beginning of each file.


For example, the buffer energy experiments can be compiled as follows:

nvcc -O3 -arch=sm_70 -lnvidia-ml -o buffer_energy_experiments

To run the code, which may take a few minutes, enter:

./buffer_energy_experiments 0 100000000 35

The resulting output might look something like the following, where the 7 values in each line represent the number of iterations, the energy consumption with random values, the runtime with random values, the energy consumption with all 1 bits, the runtime with all 1 bits, the energy consumption with all 0 bits, and the runtime with all 0 bits:

4852, 1468873, 9.9956, 1193055, 9.9959, 1189991, 9.9960


A. Fallin and M. Burtscher. "Reducing Memory-Bus Energy Consumption of GPUs via Software-Based Bit-Flip Minimization." Workshop on Memory Centric High-Performance Computing. November 2022. [pdf] [pptx]

This work has been supported in part by Texas State University as well as by equipment donations from NVIDIA Corporation.

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