| ■ | General | |||||
|
|
||||||
| ● | When: |
|||||
| Section | Date | Start Time | ||||||||
| 251 | 05-01-2025 (Thursday) | 11:00 am | ||||||||
| 255&6 | 05-01-2025 (Thursday) | 08:00 pm | ||||||||
| ● | Duration: 2 hours 30 minutes (in-class, face-to-face). | |||||
| ● | Test will be closed books / notes / online-resources / discussion and no calculating devices of any kind are allowed. | |||||
| ► | All allowed reference material (such as the first 2 pages of this posted under Other Resources) will be provided as part of the exam. | |||||
| ● | Exam will be comprehensive (i.e., cumulative). | |||||
|
|
||||||
| ■ | For earlier (previously tested) topics: refer to Exam 1 Study Guide and Exam 2 Study Guide previously posted. | |||||
| ■ | For latter topics, following is a checklist of (most if not all) the things you are expected to know and/or know how to do/apply: | |||||
| ● | How to translate into MIPS assembly language code (based on algorithm expressed in C++ or pseudocode) - in like fashion as Assignment 2 Part 3 and Assignment 3 Part 1: |
|||||
| ► | Code that can be successfully exercised on MARS (Java-based MIPS emulator modified for use in this class). | |||||
| ► | Code that make use of instructions/pseudoinstructions listed in MIPS instructions/pseudoinstructions covered in class that have been covered (plus any not on the list but seen used in class). | |||||
| ► | May involve arithmetic, bit manipulation and main memory data movement. | |||||
| ► | May involve selection (if and if-else) and/or repetition (for, while and do-while) and/or one-way transfer (break and continue). | |||||
| ○ | May be nested and may involve compound conditions (i.e., conditions involving logical AND and/or logical OR). | |||||
| ○ | Including traversing/processing arrays. | |||||
| ► | May involve the Stack Segment and MIPS support for doing functions. | |||||
| ○ | How to allocate, use
(load and store values) and deallocate stack segment memory (for
local variables). (In contrast to global variables in data segment.) |
|||||
| ♯ | Use of $sp register. | |||||
| ♯ | Stack grows with decreasing address - subtract from $sp to allocate, add to $sp to deallocate. | |||||
| ○ | What roles jal and jr instructions and the $ra register play. | |||||
| ○ | How to do function (in MIPS) in "small-time, unregulated" fashion. | |||||
| ○ | Know the inadequacies/limitations (thus "dangers") of doing function (in MIPS) in "small-time, unregulated" fashion. | |||||
| (There are typically multiple questions, ranging from "simpler, low-value" to "more involved, high-value".) | ||||||
| (May involve reading(interpreting)/debugging/modifying/completing (such as filling in "holes" intentionally made)/...
given code.) |
||||||
| ● | Knowledge
related to MIPS32's 3 main instruction
formats (Register, Immediate
and Jump) and how to put them to use in encoding/decoding
MIPS instructions, and MIPS addressing modes (register,
immediate,
base-displacement, PC-relative and pseudodirect) involved. |
|||||
| ► | Immediate value in a branch instruction specifies words (not bytes). | |||||
| ○ | (WOffset --> words relative to PC) | |||||
| ► | How destination address is formed from (or encoded into) the target ("pseudoaddress") of a J-format (especially the jump) instruction. | |||||
| ○ | (destination address = upper-4-bits-of-PC | target | 00) | |||||
| ( and whatever mixed-bag items below we get to cover up to and including the last lectures on 04/24/25 ) ( don't have to worry about those not ("time-permittingly") covered ) |
||||||
| ● | "Deeper/quirky/idiosyncratic" things about MIPS. | |||||
| ► | What lui instruction does and when it is useful. | |||||
| ► | Use of u in instructions is overloaded. |
|||||
| ○ | Don't sign extend (but zero extend) - e.g.: lbu vs lb. | |||||
| ○ | Don't trap overflow (just keep silent about it and continue) - e.g.: addu vs add. | |||||
| ○ | Do unsigned compare (not signed compare) - e.g.: sltu vs slt. | |||||
| ► | How 16-bit immediate field is extended. | |||||
| ○ | Arithmetic instructions (e.g.: addi and addiu) - always sign extend. | |||||
| ○ | Load/store instructions (e.g.: lb and lbu) - always sign extend. | |||||
| ○ | Logical instructions (e.g.: ori) - always zero extend. | |||||
| ○ | Set instructions (e.g.: slti and sltiu) - sign extend if no u (not unsigned version), otherwise zero extend. | |||||
| ► | How loaded value (that is sub-word-sized) is extended. | |||||
| ○ | Sign extend if no u (not unsigned version such as lb), otherwise (such as lbu) zero extend. | |||||
| ● | Conceptual knowledge/understanding of how to do functions (in MIPS) in "big-time, regulated" fashion. | |||||
| ► | Concept of and motivation for putting in place some facilitating/regulating function-call convention (set of rules). |
|||||
| ► | "stack to the rescue" for situations calling for preservation (as functions call each other) of contents of some registers (with registers being the "fast but few" premium resource). | |||||
| ○ | Splitting of responsibility leads to caller-saved and callee-saved registers. | |||||
| ○ | Invariably, need to save and restore (in order to preserve), which in turn leads to . . . | |||||
| . . . need to source secondary ("plenty but slow" and less premium) storage as staging area (place to save to and restore from). | ||||||
| ► | "stack to the rescue" for still other aspects that lead to need to source secondary ("plenty but slow" and less premium) storage. | |||||
| ○ | Sizeable (and often addressable) scratch storage (such as temporary local arrays and variables). | |||||
| ○ | Additional overhead storage to support less common cases (such as functions involving uncommonly high number of arguments). | |||||
| ○ | . . . | |||||
| ► | Deal with various "stack to the rescue" storage needs in unified fashion with a one-stop resource widely referred to as stack frame or activation record. |
|||||
| ○ | "allocate (construct) stack
frame" in function's prolog, "deallocate (tear down) stack frame" in function's epilog. |
|||||
| ● | Deeper knowledge related to compile-assemble-link-load framework. | |||||
| ► | How relative addresses in object files (modules) relate to absolute addresses in the executable. | |||||
| ► | What types of instructions give rise to unresolved references: those that require absolute addresses (j, jal and data-segment-referencing instructions). | |||||
| ► | How the linker generates linked outcome (linked addresses and linked contents), including the fixing up of unresolved references. | |||||
| ○ | What needs fixing. | |||||
| ○ | How fixing is done. | |||||
| Other Resources/Tips |
| ■ | You may want to review Exam1 and Exam 2. | |||||
| ■ | It is only fair that you need not have to worry about questions being written on topics that have not been covered/discussed. However, somewhat indirect question(s) may be written that test(s) your understanding of and your ability to apply the concepts covered/discussed during the semester, individually (involving a single concept) or in combination (involving multiple concepts). | |||||
| ■ | Do the following if you are eligible and intend to use ATSD-supported accommodations (extended time, . . .): | |||||
| ● | Follow proper procedure to request taking the exam at the ATSD. | |||||
| ► | You typically need to do the request at least a certain number of (non-weekend?) days/hours in advance. | |||||
| ► | The start time of your request should be the closest to your class start time on exam date. | |||||